AArch64 is currently hard coded to 128B. There exist ARM machines that use either 64B or 128B cache line sizes, so using #ifdef _aarch64_ compiler system-specific macro will not work for defining the cache line size.

Instead, the ARM machine can be inspected during build via ARMv8 Main ID Register, and the cache line size can then be passed via compiler option -DCACHE_LINE_SIZE=128

Please see https://gerrit.fd.io/r/#/c/8372/ for how to use ARMv8 Main ID Register. This code should be moved to a different location where it can be shared / included by more than one Makefile.